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Hardware implementation challenges of modern error control decoders

Posted September 25, 2013

Schlegel, C.; Gaudet, V.    2011   

The basic design challenges for large-scale modern error control decoders based on message passing are examined in this review and exploratory paper. Space, complexity, and power consumption figures are of most interest to the design engineer, and the state-of-the art of current implementations are presented. Fundamental limits of performance versus power and complexity are discussed, and innovative state-of-the art approaches to address these challenges are highlighted.

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